1. Field of the Invention
The present invention relates to an information collection device and method, used with a communications network for transmitting cells containing data, and for collecting information for each connection which is set up on the communications network. More particularly, the present invention relates to an information collection device and method for collecting information on the states and characteristics of connections in a communications network using the ATM (Asynchronous Transfer Mode) switching technology.
2. Description of the Related Art
ATM switching, which constitutes the nucleus of broadband ISDNs (Integrated Services Digital Networks), that are the next generation of communications networks, is a technology that transfers all information in packets of a set length, called cells, over a communications network and enables high-speed information transfer.
In an ATM network, a VPI (Virtual Path Identifier) or VCI (Virtual Channel Identifier) in the header of a cell to be transmitted specifies a virtual connection (ATM connection) to which that cell belongs and the cell routing control is performed for each ATM connection.
ATM connections include VP connections identified by VPIs and VC connections identified by VPIs and VCIs.
A communications network utilizing the ATM switching technology has, as one of its important functions, an OAM (Operation, Administration and Maintenance) function of supervising failures in the network and/or monitoring the performance of the network. Cells that carry the OAM information on the ATM network are referred to as OAM cells.
OAM cells used to supervise network failures include AIS (Alarm Indication Signal) cells and RDI (Remote Defect Indication) cells. The AIS cells or RDI cells are generated in the event that a failure occurs in the protocol ATM layer.
For example, in the AIS-cell-based supervision of ATM layer failures, the transition from the alarm to the defective state will occur when a single AIS cell is received. Return is made to the normal state when no alarm cell is received for three seconds in succession or when a user cell is received. In the latter case, the user cell serves as a cell which makes a recovery from the alarm state to the normal state. It is required to notify a call processing processor in the ATM switching unit of whether the alarm state is either in the failed state or the normal state.
OAM cells used to monitor the network's performance include PM (Performance Management) cells. ATM-network data collection devices for measuring the characteristics of ATM-connections include ATM-connection quality measuring devices and ATM-cell accounting devices.
The ATM-network data collection device, which measures the characteristics of ATM cells coming in or going out from the ATM switching unit, determines the cell characteristics from cells coming in the collection device and updates statistical information. The collection device has a function of transferring the contents of the statistical information to the call processing processor when so requested by it.
The ATM connection quality measuring device collects information about the number of discarded cells, the number of passing cells, the number of bit errors, etc., to make measurement of the quality of ATM connections. The ATM cell accounting device counts the number of cells coming into the ATM switching unit and the number of cells discarded in the switching unit for each ATM connection.
In FIG. 1, which illustrates, in block diagram form, a conventional ATM network data collection device, a connection identification circuit 1 detects connection identifiers corresponding to addresses of network data to be updated in a statistical information memory 7 from incoming cells. A network data collection circuit 3 collects or computes data used for updating from the incoming cells.
The statistical information memory 7 retains network data. A network data update circuit 6 adds network data stored in that address in the statistical information memory 7 which is indicated by the connection identification circuit 1 and an output of the network data collection circuit 3 at the time a cell arrives.
A processor interface circuit 2 reads the contents of the statistical information memory 7 in response to a data readout request by a line control processor or call processing processor. An address selector 4 selects either of outputs of the connection identification circuit 1 and the processor interface circuit 2 as an access address in the information memory 7. A data selector 5 selects either of outputs of the network data update circuit 6 and the processor interface circuit 2 as data to be written into the statistical information memory 7.
FIG. 2 shows a configuration of the statistical information memory 7 when the ATM network data collection device of FIG. 1 is adapted to count the number of passing cells for each VPI by way of example. In the memory of FIG. 2, information on the number of passing cells for which VPI=i is stored in the address i.
Upon receipt of an incoming cell, the connection identification circuit 1 latches its VPI. At this point, the address selector 4 selects the output of the connection identification circuit 1, whereby the number of passing cells is read from that address in the memory 7 which is indicated by the VPI output from the connection identification circuit.
The network data update circuit 6 increments the number of passing cells read from the memory 7 by one and then writes the result into the memory 7 via the data selector 5.
When the processor interface circuit 2 receives a request for readout by the line control processor or call processing processor, it creates a read address. At this point, the address selector 4 selects the output of the processor interface circuit 2, so that the number of passing cells is read from the memory 7. The processor interface circuit 2 then sets the number of passing cells to zero and writes it into the memory 7. Thereby, the information on the number of passing cells read from the memory is cleared to zero (zero clear function).
Thus, the conventional ATM network data collection device is required to make four types of accesses to the statistical information memory 7: the reading out of statistical information at the arrival of a cell, the writing in of updated statistical information, the reading out of statistical information when a processor makes a request for information readout, and the clearing of statistical information to zero
In the conventional ATM network data collection device, in order to avoid the competition between a memory update request at the arrival of a cell and a memory readout request by the call processing processor, the interval of time during which one cell passes (one cell slot) is generally divided into four subintervals (subslots) as shown in FIG. 3. In each subslot, a corresponding one of the four types of memory accesses is made.
A device that supervises alarm cells (AIS cells, RDI cells) is essential for the spread of the broadband ISDN. However, there is no precedent for such a device. Therefore, it is required to provide a device which uses predetermined transition conditions to manage the alarm state and to notify the call processing processor in the ATM switching unit.
For that purpose, it is required to provide a memory which holds an alarm state for each ATM connection and a memory which holds timer values by counting an alarm cell non-receiving interval of three seconds that is a condition for recovery from the alarm state, which will increase the amount of memory hardware required.
To measure each non-receiving interval accurately, the pulse unit time must be divided into a large number of subperiods on which time count is made (the timer value is incremented by one for each subperiod). The timer values for all the ATM connections that have been set must be updated during each subperiod. If, therefore, the number of ATM connections increases greatly, then each subperiod will have to be made long enough to accommodate all the ATM connections. This will make a large error in the measurement of the unreceiving interval.
When each of the ATM connection alarm states is stored in sequence in the memory address direction, only one ATM connection alarm state is presented to the call processing processor in the ATM switching unit by a single read operation.
In the event that a certain ATM connection goes into the failed state, it is required to notify the call processing processor of which connection is in the failed state. However, if a large number of connections have been set, it will require a large amount of processing time to read the alarm states of all the connections. In this case, the alarm states of connections that are in the normal state must also be read, involving wasted time. Thus, the call processing processor will require an appreciable amount of time in order to assess the alarm states of all the ATM connections.
In addition, the conventional ATM network data collection device has the following problems. Although the ATM network data collection device of FIGS. 2 and 3 has been described as collecting a single type of statistical information (the number of passing cells), the statistical information to be collected generally involves more than one item. In general, it is thus required to update more than one item of statistical information at the arrival of one cell.
Assuming here that statistical information includes items (a), (b), etc., one-cell passing interval (the interval of one cell) is divided into such memory access cycles as shown in FIG. 4. In FIG. 4, the number of memory access cycles within one cell interval is four times the number of items corresponding to the four types of accesses shown in FIG. 3.
Here, the basic ATM cell processing rate is 156 Mbps (megabytes per second) or 622 Mbps, and one cell is 53 bytes (54 bytes) long. Therefore, the one cell interval is about 2.7 microseconds (in the case of 156 Mbps) or about 675 nanoseconds (in the case of 622 Mbps). In an ATM network data collection device intended to collect more than one item of statistical information, such memory accesses as shown in FIG. 4 must be carried out within one cell interval.
Since there is a lower limit on a single memory access cycle, the number of times within one cell interval the memory access is made is limited spontaneously. For example, supposing one memory access cycle to be 75 ns in a 622-Mbps interface, the maximum number of accesses possible within one cell interval will be nine. Since the number of memory accesses within one cell interval is four times the number of statistical information items, the number of items in this case will be limited to two or less.
With the conventional memory access method as shown in FIG. 4, one cell interval is divided into memory cycles, the number of which is four times the number of statistical information items. Depending on incoming cells, therefore, time slots for updating will also be allocated to items which need not be updated. Therefore, useless time slots which are not needed will be produced.